The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 19, 2013
Filed:
Mar. 24, 2010
Serge Jaunay, Sunnyvale, CA (US);
Suresh Belani, Los Altos, CA (US);
Frank Kuo, Kaohsiung, TW;
Sen Mao, Kaohsiung, TW;
Peter Wang, Kaohsiung, TW;
Serge Jaunay, Sunnyvale, CA (US);
Suresh Belani, Los Altos, CA (US);
Frank Kuo, Kaohsiung, TW;
Sen Mao, Kaohsiung, TW;
Peter Wang, Kaohsiung, TW;
Vishay-Siliconix, Santa Clara, CA (US);
Abstract
The present technology is directed toward semiconductors packaged by electrically coupling a plurality of die to an upper and lower lead frame. The opposite edges of each corresponding set of leads in the upper lead frame are bent. The leads in the upper lead frame are electrically coupled between respective contacts on respective die and respective lower portion of the leads in the lower lead frame. The bent opposite edges of each corresponding set of leads of the upper lead frame support the upper lead frame before encapsulation, for achieving a desired position of the plurality of die between the leads of the upper and lower lead frames in the packaged semiconductor. After the encapsulated die are separated, the upper leads have an L-shape and electrically couple die contacts on upper side of the die to leads on the lower side of the die so that the package contacts are on the same side of the semiconductor package.