The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 15, 2013
Filed:
Dec. 08, 2008
Emile Y. Sahouria, Sunnyvale, CA (US);
Emile Y. Sahouria, Sunnyvale, CA (US);
Mentor Graphics Corporation, Wilsonville, OR (US);
Abstract
A method of parsing integrated circuit layout design data. According to some implementations, the segment boundaries are designated by first identifying data in the integrated circuit layout design data that matches a cell record start value. Next, the subsequent data is parsed, until a threshold amount of subsequent data has been parsed without identifying another cell record start value. When the threshold amount of subsequent data has been parsed without identifying another cell record start value, the next data in the integrated circuit layout design data matching a cell record start value is designated as a segment boundary. Integrated circuit layout design data can be segmented sequentially, or by using dyadic division. Once the integrated circuit layout design data has been broken up into segments, the segments can be provided to a parallel processing computing system for parsing in parallel.