The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8558262 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 15, 2013

Filed:

Feb. 10, 2011
Applicants:

Shang-yi Wu, Hsinchu, TW;

Chien-hui Chen, Taoyuan County, TW;

Inventors:

Shang-Yi Wu, Hsinchu, TW;

Chien-Hui Chen, Taoyuan County, TW;

Assignee:

Xintec Inc., Jhongli, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/00 (2010.01);
U.S. Cl.
CPC ...
Abstract

A method for fabricating a silicon submount for LED packaging. A silicon substrate is provided. A reflection layer is formed on the silicon substrate. Portions of the reflection layer and the silicon substrate are removed to form openings. A wafer backside grinding process is carried out to thin the silicon substrate thereby turning the openings into through silicon vias. An insulating layer is then deposited to cover the reflection layer and the silicon substrate. A seed layer is formed on the insulating layer. A resist pattern is then formed on the seed layer. A metal layer is formed on the seed layer not covered by the resist pattern. The resist pattern is then stripped. The seed layer not covered by the metal layer is then removed.


Find Patent Forward Citations

Wu, Shang-Yi. (2013). High-reflection submount for light-emitting diode package and fabrication method thereof (U.S. Patent No. 8558262). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8558262

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