The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 01, 2013
Filed:
Nov. 04, 2011
Hak-lay Chuang, Singapore, SG;
Sheng-chen Chung, Jhubei, TW;
Wei Cheng Wu, Zhubei, TW;
Bao-ru Young, Zhubei, TW;
Huan-just Lin, Hsinchu, TW;
Tsai-chun LI, Hsinchu, TW;
Hak-Lay Chuang, Singapore, SG;
Sheng-Chen Chung, Jhubei, TW;
Wei Cheng Wu, Zhubei, TW;
Bao-Ru Young, Zhubei, TW;
Huan-Just Lin, Hsinchu, TW;
Tsai-Chun Li, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method of making an integrated circuit includes providing a substrate with a high-k dielectric and providing a polysilicon gate structure over the high-k dielectric. A doping process is performed on the substrate adjacent to the polysilicon gate structure, after which the polysilicon gate structure is removed and replaced with a metal gate structure. An interlayer dielectric (ILD) is deposited over the metal gate structure and the doped substrate, and a dry etch process forms a trench in the ILD to a top surface of the metal gate structure. After the dry etch process, a wet etch process forms an undercut near the top surface of the metal gate structure. The trench and undercut are then filled with a conductive material.