The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 01, 2013
Filed:
Feb. 25, 2008
Haruo Furuta, Tokyo, JP;
Shuichi Ueno, Tokyo, JP;
Ryoji Matsuda, Tokyo, JP;
Tatsuya Fukumura, Tokyo, JP;
Takeharu Kuroiwa, Tokyo, JP;
Lien-chang Wang, Milpitas, CA (US);
Eugene Chen, Milpitas, CA (US);
Yiming Huai, Milpitas, CA (US);
Haruo Furuta, Tokyo, JP;
Shuichi Ueno, Tokyo, JP;
Ryoji Matsuda, Tokyo, JP;
Tatsuya Fukumura, Tokyo, JP;
Takeharu Kuroiwa, Tokyo, JP;
Lien-Chang Wang, Milpitas, CA (US);
Eugene Chen, Milpitas, CA (US);
Yiming Huai, Milpitas, CA (US);
Renesas Electronics Corporation, Kanagawa, JP;
Abstract
Disclosed is a method for manufacturing a magnetic storage device comprising a TMR element, which comprises a step for forming an insulting film on an interlayer insulating film provided with a wiring layer, an opening formation step for forming an opening in the insulating film so that the wiring layer is exposed therefrom, a metal layer formation step for forming a metal layer on the insulating layer so that the opening is filled therewith, a CMP step for polishing and removing the metal layer on the insulating layer by a CMP method and forming the metal layer remaining in the opening into a lower electrode, and a step for forming a TMR element on the lower electrode. Also disclosed is a magnetic storage device comprising an interlayer insulating film provided with a wiring layer, an insulating film formed on the interlayer insulating film, an opening formed in the insulating film so that the wiring layer is exposed therefrom, a barrier metal layer provided so as to cover the inner surface of the opening, a lower electrode formed on the barrier metal so as to fill the opening, and a TMR element formed on the lower electrode.