The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 2013

Filed:

Aug. 29, 2011
Applicants:

Beena Pious, Carrollton, TX (US);

Jayesh C. Raval, Allen, TX (US);

Wah Kit Loh, Richardson, TX (US);

Stanton Petree Ashburn, McKinney, TX (US);

Inventors:

Beena Pious, Carrollton, TX (US);

Jayesh C. Raval, Allen, TX (US);

Wah Kit Loh, Richardson, TX (US);

Stanton Petree Ashburn, McKinney, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G11C 29/50 (2006.01);
U.S. Cl.
CPC ...
G11C 29/50 (2013.01);
Abstract

A method of screening static random access memory (SRAM) arrays to identify memory cells with bit line side pass transistor defects. After writing a known data state to the memory cells under test, a forward back-bias is applied to the load transistors of those cells. A write of the opposite data state is then performed, followed by a read of the memory cells. The process is repeated for the opposite data state.


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