The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 2013

Filed:

Dec. 16, 2009
Applicants:

Katsuhiko Nakai, Yamaguchi, JP;

Atsushi Ikari, Yamaguchi, JP;

Masamichi Ohkubo, Yamaguchi, JP;

Inventors:

Katsuhiko Nakai, Yamaguchi, JP;

Atsushi Ikari, Yamaguchi, JP;

Masamichi Ohkubo, Yamaguchi, JP;

Assignee:

Siltronic AG, Munich, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C30B 15/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

Silicon wafers having excellent voltage resistance characteristics of an oxide film and high C-mode characteristics are derived from single crystal silicon ingots doped with nitrogen and hydrogen, characterized in that a plurality of voids constituting a bubble-like void aggregates are present ≧50% relative to total voids; a Vregion having a void density of over 2×10/cmand below 1×10/cmis ≦20% of the total area of wafer; a Vregion having a void density of 5×10to 2×10/cmoccupies ≧80% of the total area of the wafer; and bulk microdefect density is ≧5×10/cm.


Find Patent Forward Citations

Nakai, Katsuhiko. (2013). Silicon wafer and method for producing the same (U.S. Patent No. 8524001). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8524001

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