The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 27, 2013
Filed:
Jul. 17, 2012
Haoyu Song, Cupertino, CA (US);
Cao Wei, Cupertino, CA (US);
Rui Niu, Cupertino, CA (US);
Anwar A. Mohammed, San Jose, CA (US);
Haoyu Song, Cupertino, CA (US);
Cao Wei, Cupertino, CA (US);
Rui Niu, Cupertino, CA (US);
Anwar A. Mohammed, San Jose, CA (US);
Futurewei Technologies, Inc., Plano, TX (US);
Abstract
A multi-die integrated circuit assembly includes an interposer substrate larger than the typical reticle size used in fabricating the 'active area' in which the through-silicon vias (TSVs) and interconnect conductors are formed in the interposer. At the same time, each of the dies has its external power/ground and I/O signal line connections concentrated into a smaller area of the die. The dies are disposed or mounted on the interposer such that these smaller areas (with the power/ground/IO connections) overlap with the active area of the interposer. In this configuration, a plurality of dies having a combined area substantially greater than the active area of the interposer can be mounted on the interposer (and take advantage of the active area for interconnections).