The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 27, 2013
Filed:
Dec. 23, 2011
Kuo-hsiung Huang, Hsinchu County, TW;
Chun-mao Chiou, Chiayi County, TW;
Hsin-yu Chen, Nantou County, TW;
Yu-han Tsai, Kaohsiung, TW;
Ching-li Yang, Ping-Tung Hsien, TW;
Home-been Cheng, Keelung, TW;
Kuo-Hsiung Huang, Hsinchu County, TW;
Chun-Mao Chiou, Chiayi County, TW;
Hsin-Yu Chen, Nantou County, TW;
Yu-Han Tsai, Kaohsiung, TW;
Ching-Li Yang, Ping-Tung Hsien, TW;
Home-Been Cheng, Keelung, TW;
United Microelectronics Corp., Science-Based Industrial Park, Hsin-Chu, TW;
Abstract
The present invention relates to a through silicon via (TSV). The TSV is disposed in a substrate including a via opening penetrating through a first surface and a second surface of the substrate. The TSV includes an insulation layer, a barrier layer, a buffer layer and a conductive electrode. The insulation layer is disposed on the surface of the via opening. The barrier layer is disposed on the surface of the insulation layer. The conductive electrode is disposed on the surface of the buffer layer and fills the via opening. The buffer layer further covers a surface of the conductive electrode at the side of the second surface. The present invention further discloses a method of forming the TSV.