The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2013

Filed:

Jun. 18, 2012
Applicants:

Vasileios Kourkoulos, Grenoble, FR;

Roberto Suaya, Meylan, FR;

Inventors:

Vasileios Kourkoulos, Grenoble, FR;

Roberto Suaya, Meylan, FR;

Assignee:

Mentor Graphics Corporation, Wilsonville, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Aspects of the invention relate to techniques for extracting admittance values associated with through-silicon vias in an integrated circuit system. A function fitting process is performed to generate parameters of a representation for electro-quasi-static potential Green's functions at a plurality of frequencies of interest based on integrated circuit manufacturing process information. Based on the generated parameters, a set of electric potential basis functions, a set of electric displacement basis functions and layout information for a layout design of interest, matrix elements of a matrix for each frequency in the plurality of frequencies of interest may be computed. The matrix is a part of a linear system that formulates a relationship of electric displacement fields and electric potentials in various regions associated with through-silicon vias in the layout design. Based on the matrix, admittance values associated with the through-silicon vias are computed.


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