The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 06, 2013
Filed:
Jan. 28, 2008
Jung-hwan Park, Seongnam-si, KR;
Keungjin Sohn, Suwon-si, KR;
Joon-sik Shin, Suwon-si, KR;
Sang-youp Lee, Seoul, KR;
Ho-sik Park, Suwon-si, KR;
Joung-gul Ryu, Seoul, KR;
Jung-Hwan Park, Seongnam-si, KR;
Keungjin Sohn, Suwon-si, KR;
Joon-Sik Shin, Suwon-si, KR;
Sang-Youp Lee, Seoul, KR;
Ho-Sik Park, Suwon-si, KR;
Joung-Gul Ryu, Seoul, KR;
Samsung Electro-Mechanics Co., Ltd., Suwon, KR;
Abstract
A method of manufacturing a printed circuit board includes stacking a solder resist layer on one side of a carrier; forming a first circuit pattern, which includes a first electrode pad, on the solder resist layer; forming a conductive post on the first electrode pad; stacking and pressing the carrier onto an insulation layer stacked in an inner substrate, such that the conductive post faces the insulation layer; and removing the carrier. As the conductive posts are pressed into the insulation layers to implement interlayer connections, certain drilling processes for forming via holes may be omitted, so that the degree of freedom can be increased in designing the circuits, and the circuits can be made to have greater densities. As the circuit patterns are buried in the insulation layers, the board can be made thinner, and the attachment areas can be increased, to allow greater adhesion.