The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2013

Filed:

May. 07, 2012
Applicants:

Akira Goda, Boise, ID (US);

Tomoharu Tanaka, Kanagawa, JP;

Krishna Parat, Palo Alto, CA (US);

Prashant Damle, Santa Clara, CA (US);

Shafqat Ahmed, San Jose, CA (US);

Inventors:

Akira Goda, Boise, ID (US);

Tomoharu Tanaka, Kanagawa, JP;

Krishna Parat, Palo Alto, CA (US);

Prashant Damle, Santa Clara, CA (US);

Shafqat Ahmed, San Jose, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods for programming a memory device, memory devices configured to perform the disclosed programming methods, and memory systems having a memory device configured to perform the disclosed programming methods, for example, are provided. According to at least one such method, multiple independent semiconductor well regions each having strings of memory cells are independently biased during a programming operation performed on a memory device. Reduced charge leakage may be realized during a programming operation in response to independent well biasing methods.


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