The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2013

Filed:

Dec. 03, 2010
Applicants:

Chi-ming Chen, Zhubei, TW;

Chung-yi Yu, Hsin-Chu, TW;

Chia-shiung Tsai, Hsin-Chu, TW;

Ho-yung David Hwang, Hsinchu, TW;

Inventors:

Chi-Ming Chen, Zhubei, TW;

Chung-Yi Yu, Hsin-Chu, TW;

Chia-Shiung Tsai, Hsin-Chu, TW;

Ho-Yung David Hwang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/46 (2006.01); H01L 21/76 (2006.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided is a method of fabricating a semiconductor device. The method includes forming a first layer on a first side of a first silicon wafer. The first silicon wafer has a second side opposite the first side. The first layer has a coefficient-of-thermal-expansion (CTE) that is lower than that of silicon. The method includes bonding the first wafer to a second silicon wafer in a manner so that the first layer is disposed in between the first and second silicon wafers. The method includes removing a portion of the first silicon wafer from the second side. The method includes forming a second layer over the second side of the first silicon wafer. The second layer has a CTE higher than that of silicon.


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