The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 21, 2013
Filed:
Dec. 22, 2009
Christopher J. Hughes, Cupertino, CA (US);
Yen-kuang (Y. K.) Chen, Cupertino, CA (US);
Mayank Bomb, Hillsboro, OR (US);
Jason W. Brandt, Austin, TX (US);
Mark J. Buxton, Chandler, AZ (US);
Mark J. Charney, Lexington, MA (US);
Srinivas Chennupaty, Portland, OR (US);
Jesus Corbal, Barcelona, ES;
Martin G. Dixon, Portland, OR (US);
Milind B. Girkar, Sunnyvale, CA (US);
Jonathan C. Hall, Hillsboro, OR (US);
Hideki (Saito) Ido, Sunnyvale, CA (US);
Peter Lachner, Heroldstatt, DE;
Gilbert Neiger, Portland, OR (US);
Chris J. Newburn, South Beloit, IL (US);
Rajesh S. Parthasarathy, Hillsboro, OR (US);
Bret L. Toll, Hillsboro, OR (US);
Robert Valentine, Kiryat Tivon, IL;
Jeffrey G. Wiedemeier, Austin, TX (US);
Christopher J. Hughes, Cupertino, CA (US);
Yen-Kuang (Y. K.) Chen, Cupertino, CA (US);
Mayank Bomb, Hillsboro, OR (US);
Jason W. Brandt, Austin, TX (US);
Mark J. Buxton, Chandler, AZ (US);
Mark J. Charney, Lexington, MA (US);
Srinivas Chennupaty, Portland, OR (US);
Jesus Corbal, Barcelona, ES;
Martin G. Dixon, Portland, OR (US);
Milind B. Girkar, Sunnyvale, CA (US);
Jonathan C. Hall, Hillsboro, OR (US);
Hideki (Saito) Ido, Sunnyvale, CA (US);
Peter Lachner, Heroldstatt, DE;
Gilbert Neiger, Portland, OR (US);
Chris J. Newburn, South Beloit, IL (US);
Rajesh S. Parthasarathy, Hillsboro, OR (US);
Bret L. Toll, Hillsboro, OR (US);
Robert Valentine, Kiryat Tivon, IL;
Jeffrey G. Wiedemeier, Austin, TX (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
According to a first aspect, efficient data transfer operations can be achieved by: decoding by a processor device, a single instruction specifying a transfer operation for a plurality of data elements between a first storage location and a second storage location; issuing the single instruction for execution by an execution unit in the processor; detecting an occurrence of an exception during execution of the single instruction; and in response to the exception, delivering pending traps or interrupts to an exception handler prior to delivering the exception.