The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 21, 2013
Filed:
Jul. 22, 2011
Chien Rhone Wang, Hsin-Chu, TW;
Tzu-cheng Lin, Hsin-Chu, TW;
Yu-jen Cheng, Hsin-Chu, TW;
Chih-wei Lai, Hsin-Chu, TW;
Hung-pin Chang, Taipei, TW;
Tsang-jiuh Wu, Hsin-Chu, TW;
Chien Rhone Wang, Hsin-Chu, TW;
Tzu-Cheng Lin, Hsin-Chu, TW;
Yu-Jen Cheng, Hsin-Chu, TW;
Chih-Wei Lai, Hsin-Chu, TW;
Hung-Pin Chang, Taipei, TW;
Tsang-Jiuh Wu, Hsin-Chu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
Methods and apparatus for performing end point determination. A method includes receiving a wafer into an etch tool chamber for performing an RIE etch; beginning the RIE etch to form vias in the wafer; receiving in-situ measurements of one or more physical parameters of the etch tool chamber that are correlated to the RIE etch process; providing a virtual metrology model for the RIE etch in the chamber; inputting the received in-situ measurements to the virtual metrology model for the RIE etch in the chamber; executing the virtual metrology model to estimate the current via depth; comparing the estimated current via depth to a target depth; and when the comparing indicates the current via depth is within a predetermined threshold of the target depth; outputting a stop signal. An apparatus for use with the method embodiment is disclosed.