The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 30, 2013
Filed:
Aug. 10, 2009
Maxwell Walthour Lippitt, Iii, Rockwall, TX (US);
Stephen Arlon Meisner, Allen, TX (US);
Lee Alan Stringer, Frisco, TX (US);
Stephen Fredrick Clark, Plano, TX (US);
Fred Percy Debnam, Ii, Garland, TX (US);
Byron Lovell Williams, Plano, TX (US);
Maxwell Walthour Lippitt, III, Rockwall, TX (US);
Stephen Arlon Meisner, Allen, TX (US);
Lee Alan Stringer, Frisco, TX (US);
Stephen Fredrick Clark, Plano, TX (US);
Fred Percy Debnam, II, Garland, TX (US);
Byron Lovell Williams, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A method is disclosed for passivating and contacting a capacitor in an IC above a top level of interconnect metallization, without adding process steps. Passivation is accomplished by a dielectric layer, part of the IC protective overcoat, deposited directly on the capacitor, overlapping the electrode edges. Contact is made to the top electrode of the capacitor by etching small capacitor vias during a bond pad via etch process, followed by depositing and patterning bond pad metal in the capacitor vias to connect the top electrode to other circuit elements in the IC. The top electrode thickness is increased to accommodate the bond pad via etch process.