The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2013

Filed:

Jul. 21, 2010
Applicants:

Masashi Oshima, Yokohama, JP;

Masaya Ohtsuka, Kobe, JP;

Ryuta Isobe, Ikeda, JP;

Inventors:

Masashi Oshima, Yokohama, JP;

Masaya Ohtsuka, Kobe, JP;

Ryuta Isobe, Ikeda, JP;

Assignee:

Ricoh Company, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device includes a semiconductor substrate, a base insulating layer, a silicon fuse, a pair of silicon wires, a silicon guard ring, an insulation coating, a first interlayer insulating layer, a via guard ring, a metal guard ring, a final insulating layer, and a fuse window. The base insulating layer is disposed over the semiconductor substrate. The silicon fuse is disposed on the base insulating layer. The pair of silicon wires is disposed on the base insulating layer. The silicon guard ring is disposed on the base insulating layer. The insulation coating is deposited at least over surfaces of the silicon wires. The first interlayer insulating layer is disposed on the base insulating layer. The final insulating layer is disposed on the interlayer insulating layer. The fuse window is defined above the silicon fuse inside the guard rings.


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