The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 2013

Filed:

Dec. 01, 2009
Applicants:

Friedrich Hapke, Winsen, DE;

Juergen Schloeffel, Buchholz/Sproetze, DE;

Michael Wittke, Pinneberg, DE;

Rene Krenz-baath, Hamburg, DE;

Inventors:

Friedrich Hapke, Winsen, DE;

Juergen Schloeffel, Buchholz/Sproetze, DE;

Michael Wittke, Pinneberg, DE;

Rene Krenz-Baath, Hamburg, DE;

Assignee:

Mentor Graphics Corporation, Wilsonville, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

On-chip logic includes a shadow register cross-coupled with a multiple input shift/signature register (MISR). The shadow register facilitates debugging by shifting out a test signature while resetting the MISR with a fault-free signature. The on-chip logic may further include comparator circuitry to produce an output signal by comparing the test signature with the fault-free signature or by first compressing the test signature and then comparing the compressed test signature with the compressed fault-free signature.


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