Structure and fabrication of field-effect transistor using empty well in combination with source/drain extensions or/and halo pocket

Abstract

Insulated-gate field-effect transistors ('IGFETs'), both symmetric and asymmetric, suitable for a semiconductor fabrication platform that provides IGFETs for analog and digital applications, including mixed-signal applications, utilize empty-well regions in achieving high performance. A relatively small amount of semiconductor well dopant is near the top of each empty well. Each IGFET (, or) has a pair of source/drain zones laterally separated by a channel zone of body material of the empty well (, or). A gate electrode overlies a gate dielectric layer above the channel zone. Each source/drain zone (, or) has a main portion (M,M,M,M,M,M,M,M,M,M,M, orM) and a more lightly doped lateral extension (E,E,E,E,E,E,E,E,E,E,E, orE). Alternatively or additionally, a more heavily doped pocket portion (or) of the body material extends along one of the source/drain zones. When present, the pocket portion typically causes the IGFET to be an asymmetric device.