The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2013

Filed:

Jul. 09, 2010
Applicants:

Chi-hao Chiu, Hsinchu, TW;

Yui-shin Fran, Hsinchu, TW;

Ching-feng Lin, Hsinchu County, TW;

Chun-chia Huang, Tainan County, TW;

Chun-hung Lin, Yunlin County, TW;

Wen-yen Huang, Taoyuan County, TW;

Inventors:

Chi-Hao Chiu, Hsinchu, TW;

Yui-Shin Fran, Hsinchu, TW;

Ching-Feng Lin, Hsinchu County, TW;

Chun-Chia Huang, Tainan County, TW;

Chun-Hung Lin, Yunlin County, TW;

Wen-Yen Huang, Taoyuan County, TW;

Assignee:

Apaq Technology Co., Ltd., Miaoli County, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01G 9/04 (2006.01); H01G 9/15 (2006.01); H01G 4/228 (2006.01);
U.S. Cl.
CPC ...
Abstract

A stacked solid state solid electrolytic capacitor includes a plurality of capacitor units, a substrate unit and a package unit. The substrate unit includes a positive guiding substrate and a negative guiding substrate. The positive guiding substrate has a positive exposed end integrally extended therefrom along a first predetermined direction. The negative guiding substrate has a first negative exposed end integrally extended therefrom along a second predetermined direction, a second negative exposed end integrally extended therefrom along a third predetermined direction, and a third negative exposed end integrally extended therefrom along a fourth predetermined direction. The first, the second, the third and the fourth predetermined directions are different. The capacitor units are stacked on top of one another and disposed on the negative guiding substrate. The package unit encloses the capacitor units, one part of the positive and one part of the negative guiding substrate.


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