The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2013

Filed:

Nov. 12, 2010
Applicants:

Chi-chih Shen, Kaohsiung, TW;

Jen-chuan Chen, Kaohsiung, TW;

Hui-shan Chang, Kaohsiung, TW;

Chung-hsi Wu, Kaohsiung, TW;

Meng-jen Wang, Kaohsiung, TW;

Inventors:

Chi-Chih Shen, Kaohsiung, TW;

Jen-Chuan Chen, Kaohsiung, TW;

Hui-Shan Chang, Kaohsiung, TW;

Chung-Hsi Wu, Kaohsiung, TW;

Meng-Jen Wang, Kaohsiung, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention relates to a semiconductor device with a plurality of mark through substrate vias, including a semiconductor substrate, a plurality of original through substrate vias and a plurality of mark through substrate vias. The original through substrate vias and the mark through substrate vias are disposed in the semiconductor substrate and protrude from the backside surface of the semiconductor substrate. The mark through substrate vias are added at a specific position and/or in a specific pattern and serve as a fiducial mark, which facilitates identifying the position and direction on the backside surface. Thus, the redistribution layer (RBL) or the special equipment for achieving the backside alignment (BSA) is not necessary.


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