The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 12, 2013

Filed:

Nov. 11, 2010
Applicants:

Michel J. Abou-khalil, Essex Junction, VT (US);

Kiran V. Chatty, Williston, VT (US);

Chee Kwang Quek, Sunnyvale, CA (US);

Robert J. Gauthier, Jr., Hinesburg, VT (US);

Nathaniel Peachey, Oak Ridge, NC (US);

Inventors:

Michel J. Abou-Khalil, Essex Junction, VT (US);

Kiran V. Chatty, Williston, VT (US);

Chee Kwang Quek, Sunnyvale, CA (US);

Robert J. Gauthier, Jr., Hinesburg, VT (US);

Nathaniel Peachey, Oak Ridge, NC (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H02H 9/00 (2006.01); H02H 1/00 (2006.01); H02H 1/04 (2006.01); H02H 3/22 (2006.01); H02H 9/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A circuit and method for electrostatic discharge (ESD) protection. The ESD protection circuit includes: a silicon control rectifier (SCR) connected between a first voltage rail and a second voltage rail; one or more diodes connected in series in a forward conduction direction between the first voltage rail and a source of a p-channel field effect transistor (PFET); a drain of the PFET connected to the SCR and connected to ground through a current trigger device; and a control circuit connected to the gate of the PFET.


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