The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 2012

Filed:

Jun. 17, 2009
Applicants:

Takafumi Chida, Yokohama, JP;

Takahiro Nakano, Fujisawa, JP;

Koichi Izuhara, Ooizumi, JP;

Yoshiyuki Tsujimoto, Ooizumi, JP;

Inventors:

Takafumi Chida, Yokohama, JP;

Takahiro Nakano, Fujisawa, JP;

Koichi Izuhara, Ooizumi, JP;

Yoshiyuki Tsujimoto, Ooizumi, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 15/18 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention is directed to a technique that avoids occurrence of interference among multiple placement heads, when multiple placement heads simultaneously access a circuit board, and a pallet which is arranged in one direction with respect to the circuit board. When the component placement parthaving the multiple placement heads simultaneously pick up the components from the palletand simultaneously place the components on the circuit board, the controllerspecifies a pair of component groups to be picked up simultaneously from the palletby the multiple placement heads and places the components on the circuit board, so that an area where the multiple placement heads move in overlapping manner is minimized, and the placement heads respectively pick up the components included in the pair of component groups being specified and place the components on the circuit board.


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