The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 18, 2012

Filed:

Jul. 01, 2010
Applicants:

Jui-yu Pan, Pingtung, TW;

Chung-jen Hwang, Tainan, TW;

Ming-hui Shen, Dounan, TW;

Inventors:

Jui-Yu Pan, Pingtung, TW;

Chung-Jen Hwang, Tainan, TW;

Ming-Hui Shen, Dounan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/788 (2006.01);
U.S. Cl.
CPC ...
Abstract

Circuits and methods for providing a floating gate structure comprising floating gate cells having improved reverse tunnel disturb immunity. A floating gate structure is formed over a semiconductor substrate comprising a floating gate, a charge trapping dielectric layer is formed, and a control gate is formed. The floating gate structure has vertical sidewalls, one side adjacent a source region and one side adjacent a drain region. A symmetric sidewall dielectric is formed over the floating gate structure on both the source side and drain side regions. An asymmetric dielectric layer is formed over the drain side sidewall only. The use of the asymmetric sidewall on the drain side sidewall provides improved RTD immunity. Methods for forming the structure are disclosed.


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