The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 11, 2012

Filed:

Feb. 04, 2011
Applicants:

John A. Pitney, St. Peters, MO (US);

Ichiro Yoshimura, Utsunomiya, JP;

LU Fei, St. Louis, MO (US);

Inventors:

John A. Pitney, St. Peters, MO (US);

Ichiro Yoshimura, Utsunomiya, JP;

Lu Fei, St. Louis, MO (US);

Assignee:

MEMC Electronic Materials, Inc., St. Peters, MO (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 29/32 (2006.01);
U.S. Cl.
CPC ...
Abstract

The disclosure relates to preparation of silicon on insulator structures with reduced unbonded regions and to methods for producing such wafers by minimizing the roll-off amount (ROA) of the handle and donor wafers. Methods for polishing wafers are also provided.


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Pitney, John. (2012). Semiconductor wafers with reduced roll-off and bonded and unbonded soi structures produced from same (U.S. Patent No. 8330245). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8330245

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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