The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 11, 2012
Filed:
Dec. 22, 2005
Marc Zussy, St. Egreve, FR;
Bernard Aspar, Rives, FR;
Chrystelle Lagahe-blanchard, St. Joseph de Riviere, FR;
Hubert Moriceau, St. Egreve, FR;
Marc Zussy, St. Egreve, FR;
Bernard Aspar, Rives, FR;
Chrystelle Lagahe-Blanchard, St. Joseph de Riviere, FR;
Hubert Moriceau, St. Egreve, FR;
Commissariat a l'Energie Atomique, Paris, FR;
S.O.I. TEC Silicon On Insulator Technologies of Chemin des Franques, Bernin, FR;
Abstract
A method for trimming a structure obtained by bonding a first wafer to a second waver on contact faces and thinning the first waver, wherein at least either the first wafer or the second wafer is chamfered and thus exposes the edge of the contact face of the first wafer, wherein the trimming concerns the first wafer. The method includes a) selecting the second wafer from among wafers with a resistance to a chemical etching planned in b) that is sufficient with respect to the first wafer to allow b) to be carried out; b) after bonding the first wafer to the second wafer, chemical etching the edge of the first wafer to form in the first wafer a pedestal resting entirely on the contact face of the second wafer and supporting the remaining of the first wafer; and c) thinning the first wafer until the pedestal is reached and attacked, to provide a thinned part of the first wafer.