The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 04, 2012
Filed:
Mar. 05, 2010
Jayabrata Ghosh Dastidar, Santa Clara, CA (US);
Chiew Khiang Kuit, Penang, MY;
Siew Ling Yeoh, Penang, MY;
Jun Pin Tan, Kuala Lumpur, MY;
Kok Sun Chia, Kuala Lumpur, MY;
Yee Liang Tan, Penang, MY;
Kar Keng Chua, Penang, MY;
Jayabrata Ghosh Dastidar, Santa Clara, CA (US);
Chiew Khiang Kuit, Penang, MY;
Siew Ling Yeoh, Penang, MY;
Jun Pin Tan, Kuala Lumpur, MY;
Kok Sun Chia, Kuala Lumpur, MY;
Yee Liang Tan, Penang, MY;
Kar Keng Chua, Penang, MY;
Altera Corporation, San Jose, CA (US);
Abstract
Integrated circuits (ICs) with configurable test pins and a method of testing an IC are disclosed. An IC has input/output (I/O) pins that can be configured either as a test input pin, a test output pin or a user I/O pin. Selector circuits are used to selectively route and couple the I/O pins to various logic blocks and test circuitry on the IC. Selector circuits are also used to selectively couple either a user output or a test output to different I/O pins on the IC. Switches are used to configure the selector circuits and route test signals within the IC. Different configurations of the switches determine how the signals are routed. Test input signals from an I/O pin may be routed to any test circuitry within the IC and test output signals from a test circuit may be routed to any I/O pin on the IC.