The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 04, 2012
Filed:
Aug. 14, 2009
Ching-ping Chou, Saratoga, CA (US);
Su-jen Hwang, Los Altos, CA (US);
Teng-i Yu, Los Altos, CA (US);
Ching-Ping Chou, Saratoga, CA (US);
Su-Jen Hwang, Los Altos, CA (US);
Teng-I Yu, Los Altos, CA (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
A method and system for facilitating communication between a host system and one or more hardware-based functional verification systems. The one or more hardware-based functional verification systems verify the functionality of electronic circuit designs. A controller switch comprises a host interface connecting to a host system, and a plurality of device ports. Each device port connects to a hardware emulator. The controller switch further comprises a plurality of direct memory access (DMA) engines and a plurality of execution units. An execution unit comprises an instruction cache and memory storing at least one DMA instruction and at least one address for performing a software instruction and a plurality of execution unit registers.