The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 30, 2012
Filed:
May. 18, 2010
Jeanne P. Bickford, Essex Junction, VT (US);
Umberto Garofano, Essex Junction, VT (US);
James E. Jasmin, Jeffersonville, VT (US);
Ivan L. Wemple, Shelburne, VT (US);
Tad J. Wilder, South Hero, VT (US);
Jeanne P. Bickford, Essex Junction, VT (US);
Umberto Garofano, Essex Junction, VT (US);
James E. Jasmin, Jeffersonville, VT (US);
Ivan L. Wemple, Shelburne, VT (US);
Tad J. Wilder, South Hero, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method of integrated circuit design and, more particularly, a method and system to optimize semiconductor products for power, performance, noise, die area, and cost through use of variable power supply voltage compression. The method is implemented in a computer-based tool and includes: embedding relationships in an optimization tool running on a computing device, wherein the relationships are based at least partly on performance, power-supply noise, die area, and power; inputting a set of product data and a set of technology data in the optimization tool running on the computing device; and determining product design parameters including power supply voltage, switching-noise-induced power supply voltage variation, and decap area. The determining is based on the relationships, the product data, and the technology data and is performed using the computing device running the optimization tool.