The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 30, 2012
Filed:
Sep. 14, 2009
Rajit Manohar, Ithaca, NY (US);
Clinton W. Kelly, San Jose, CA (US);
Virantha Ekanayake, San Jose, CA (US);
Gael Paul, Aix-en-Provence, FR;
Raymond Nijssen, San Jose, CA (US);
Marcel Van Der Goot, Pasadena, CA (US);
Rajit Manohar, Ithaca, NY (US);
Clinton W. Kelly, San Jose, CA (US);
Virantha Ekanayake, San Jose, CA (US);
Gael Paul, Aix-en-Provence, FR;
Raymond Nijssen, San Jose, CA (US);
Marcel Van der Goot, Pasadena, CA (US);
Achronix Semiconductor Corporation, Santa Clara, CA (US);
Abstract
Methods, systems, and circuits for implementing multi-clock designs in asynchronous logic circuits are described. A method may include associating one or more data tokens with a clock domain of a multi-clock domain netlist. A durational relationship between a clock period associated with the clock domain and one or more other clock domains of the multi-clock domain netlist may be determined. Data tokens used in other clock domains may be transformed based on the determined relationship.