The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 09, 2012

Filed:

Jun. 04, 2010
Applicants:

Dario Salinas, Catania, IT;

Guglielmo Fortunato, Rome, IT;

Angelo Magri′, Belpasso, IT;

Luigi Mariucci, Rome, IT;

Massimo Cuscuna, Rome, IT;

Cateno Marco Camalleri, Catania, IT;

Inventors:

Dario Salinas, Catania, IT;

Guglielmo Fortunato, Rome, IT;

Angelo Magri′, Belpasso, IT;

Luigi Mariucci, Rome, IT;

Massimo Cuscuna, Rome, IT;

Cateno Marco Camalleri, Catania, IT;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

A process for manufacturing a MOS device and the MOS device manufactured thereby are disclosed. The process includes in a semiconductor layer forming a gate structure above the semiconductor layer; forming a first doped region within a first surface portion of the semiconductor layer; and irradiating the first doped region with electromagnetic radiation, to carry out annealing thereof. Prior to the irradiating step, a dielectric mirror is formed above a second surface portion of the semiconductor layer. The dielectric mirror, which may be of the Bragg-reflector type, reflects at least in part the electromagnetic radiation, and protects underlying regions from the electromagnetic radiation.


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