The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 02, 2012

Filed:

Aug. 18, 2009
Applicants:

Paul W. Coteus, Yorktown, NY (US);

Shawn A. Hall, Pleasantville, NY (US);

Gareth G. Hougham, Ossining, NY (US);

Alphonso P. Lanzetta, Marlboro, NY (US);

Rick A. Rand, Somers, NY (US);

Inventors:

Paul W. Coteus, Yorktown, NY (US);

Shawn A. Hall, Pleasantville, NY (US);

Gareth G. Hougham, Ossining, NY (US);

Alphonso P. Lanzetta, Marlboro, NY (US);

Rick A. Rand, Somers, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01);
U.S. Cl.
CPC ...
Abstract

A package design is provided where a chip module is connected to a printed circuit board (PCB) via a land grid array (LGA) on the top surface of the PCB, and where a power supply is connected to the PCB via a second LGA on the bottom surface of the PCB. The stack of the chip module, power supply, and LGA is held in place and compressed with actuation hardware forming an adjustable frame. The package allows field replacibility of either the module, or the PS, and provides the shortest possible wiring distance from the PS to the module leading to higher performance.


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