The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 25, 2012
Filed:
Sep. 10, 2009
Sivakumar Radhakrishnan, Portland, OR (US);
Sin S. Tan, Portland, OR (US);
Stephan J. Jourdan, Portland, OR (US);
Lily P. Looi, Portland, OR (US);
Yi-feng Liu, Chandler, AZ (US);
Sivakumar Radhakrishnan, Portland, OR (US);
Sin S. Tan, Portland, OR (US);
Stephan J. Jourdan, Portland, OR (US);
Lily P. Looi, Portland, OR (US);
Yi-Feng Liu, Chandler, AZ (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A method and system to enable power measurements of a system-on-chip in various modes. In one embodiment of the invention, the system-on-chip has full controllability of its logic and circuitry to facilitate configuration of the system-on-chip into a desired mode of operation. This allows hooks or interfaces to access the system-on-chip externally for measurements. For example, in one embodiment of the invention, the hooks in the system-on-chip allow a backend tester to configure the system-on-chip into various modes easily to perform power consumption measurements of one or more individual components of the system-on-chip. The power consumption measurement of the individual components in the system-on-chip can be performed faster and can be more accurate. In addition, the overall yield of the SOC can be increased as it is easier to detect failure parts.