The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 25, 2012

Filed:

Oct. 14, 2011
Applicants:

Zvi Or-bach, San Jose, CA (US);

Deepak C. Sekar, San Jose, CA (US);

Brian Cronquist, San Jose, CA (US);

Israel Beinglass, Sunnyvale, CA (US);

Ze'ev Wurman, Palo Alto, CA (US);

Paul Lim, Fremont, CA (US);

Inventors:

Zvi Or-Bach, San Jose, CA (US);

Deepak C. Sekar, San Jose, CA (US);

Brian Cronquist, San Jose, CA (US);

Israel Beinglass, Sunnyvale, CA (US);

Ze'ev Wurman, Palo Alto, CA (US);

Paul Lim, Fremont, CA (US);

Assignee:

MonolithIC 3D Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/335 (2006.01); H01L 21/8238 (2006.01); H01L 21/30 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacturing a semiconductor device, the method including, providing a first monocrystalline layer including semiconductor regions, overlaying the first monocrystalline layer with an isolation layer, transferring a second monocrystalline layer comprising semiconductor regions to overlay the isolation layer, wherein the first monocrystalline layer and the second monocrystalline layer are formed from substantially different crystal materials; and subsequently etching the second monocrystalline layer as part of forming at least one transistor in the second monocrystalline layer.


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