The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 04, 2012

Filed:

Sep. 20, 2006
Applicants:

Martina Hommel, Munich, DE;

Heinrich Koerner, Bruckmuhl, DE;

Markus Schwerd, Holzkirchen, DE;

Martin Seck, Munich, DE;

Inventors:

Martina Hommel, Munich, DE;

Heinrich Koerner, Bruckmuhl, DE;

Markus Schwerd, Holzkirchen, DE;

Martin Seck, Munich, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit arrangement includes a substrate with a multiplicity of integrated semiconductor components arranged therein, the substrate having a wiring interconnect near to the substrate, a middle wiring interconnect and a wiring interconnect remote from the substrate, which are arranged in this order at increasing distance from the substrate.


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Hommel, Martina. (2012). System and method for integrated circuit arrangement having a plurality of conductive structure levels (U.S. Patent No. 8258628). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8258628

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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