The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 07, 2012

Filed:

Mar. 24, 2009
Applicant:

Hironori Tanaka, Ogaki, JP;

Inventor:

Hironori Tanaka, Ogaki, JP;

Assignee:

Ibiden Co., Ltd., Ogaki-shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for manufacturing a multilayer printed wiring board having an electronic component housed therein includes forming a first conductor circuit on a first surface of a substrate. A first alignment mark is formed on the first surface of the substrate separate from the conductor circuit and forming a through bore in the substrate, the through bore extending from the first surface of the substrate to a second surface of the substrate. A seal member is disposed on the second surface of the substrate, the seal member sealing an opening on the second surface of the through bore to provide a sealed through bore. An electronic component is inserted in the sealed through bore using the first alignment mark on the first surface of the substrate.


Find Patent Forward Citations

Tanaka, Hironori. (2012). Method for manufacturing multilayer printed wiring board (U.S. Patent No. 8237060). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8237060

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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