The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 07, 2012

Filed:

Dec. 05, 2007
Applicants:

Seiki Hiramatsu, Tokyo, JP;

Kei Yamamoto, Tokyo, JP;

Atsuko Fujino, Tokyo, JP;

Takashi Nishimura, Tokyo, JP;

Kenji Mimura, Tokyo, JP;

Hideki Takigawa, Tokyo, JP;

Hiroki Shiota, Tokyo, JP;

Nobutake Taniguchi, Tokyo, JP;

Hiroshi Yoshida, Tokyo, JP;

Inventors:

Seiki Hiramatsu, Tokyo, JP;

Kei Yamamoto, Tokyo, JP;

Atsuko Fujino, Tokyo, JP;

Takashi Nishimura, Tokyo, JP;

Kenji Mimura, Tokyo, JP;

Hideki Takigawa, Tokyo, JP;

Hiroki Shiota, Tokyo, JP;

Nobutake Taniguchi, Tokyo, JP;

Hiroshi Yoshida, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/46 (2006.01); H01L 21/30 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided is a semiconductor device including: a base plate; a thermally conductive resin layer formed on an upper surface of the base plate; an integrated layer which is formed on an upper surface of the thermally conductive resin layer, and includes an electrode and an insulating resin layer covering all side surfaces of the electrode; and a semiconductor element formed on an upper surface of the electrode, in which the integrated layer is thermocompression bonded to the base plate through the thermally conductive resin layer. This semiconductor device excels in insulating properties and reliability.


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