Green transistor for resistive random access memory and method of operating the same

Abstract

A random access memory includes a plurality of memory cells arrayed in bit-lines and word-lines. Each memory cell comprises a green transistor (gFET) including a gate, a source, and a drain; a switching resistor including a first terminal and a second terminal; and a reference resistor including a third terminal and a fourth terminal. The first terminal of the switching resistor and the third terminal is connected to a bit-line, the second terminal of the switching resistor is connected to the first source of the gFET, the fourth terminal of the reference resistor is connected to the second source of the gFET, and the gate of the gFET is connected to a word-line. The method of operating the RRAM includes a write operation and a read operation The write operation comprises steps of: applying a first voltage to the bit-line to perform a large voltage difference across the bit-line and the drain of the gFET, applying a second voltage to the gate of the gFET to turn on the gFET transiently, and a large current pulse flowing through the switching resistor for changing the resistance state. The read operation comprises steps of: applying a third voltage to the bit-line to perform a small voltage difference across the bit-line and the drain of the gFET, applying a second voltage to the word-line to turn on the gFET, and comparing the current through the switching resistor with the current through the reference resistor so as to read the data stored in the memory cell.