The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 05, 2012
Filed:
Oct. 14, 2010
Frank Bin Yang, Mahwah, NJ (US);
Andrew M. Waite, Hopewell Junction, NY (US);
Scott Luning, Poughkeepsie, NY (US);
Frank Bin Yang, Mahwah, NJ (US);
Andrew M. Waite, Hopewell Junction, NY (US);
Scott Luning, Poughkeepsie, NY (US);
Advanced Micro Devices, Inc., Austin, TX (US);
Abstract
A method for fabricating a MOSFET (e.g., a PMOS FET) includes providing a semiconductor substrate having surface characterized by a (110) surface orientation or (110) sidewall surfaces, forming a gate structure on the surface, and forming a source extension and a drain extension in the semiconductor substrate asymmetrically positioned with respect to the gate structure. An ion implantation process is performed at a non-zero tilt angle. At least one spacer and the gate electrode mask a portion of the surface during the ion implantation process such that the source extension and drain extension are asymmetrically positioned with respect to the gate structure by an asymmetry measure.