The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 01, 2012

Filed:

Sep. 15, 2009
Applicants:

Tai Min, San Jose, CA (US);

Wai-ming J. Kan, San Ramon, CA (US);

David Heim, Redwood City, CA (US);

Chyu Jiuh Torng, Pleasanton, CA (US);

Inventors:

Tai Min, San Jose, CA (US);

Wai-Ming J. Kan, San Ramon, CA (US);

David Heim, Redwood City, CA (US);

Chyu Jiuh Torng, Pleasanton, CA (US);

Assignee:

MagIC Technologies, Inc., Milpitas, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A cladding structure for a conductive line used to switch a free layer in a MTJ is disclosed and includes two cladding sidewalls on two sides of the conductive line, a top cladding portion on a side of the conductive line facing away from the MTJ, and a highly conductive, non-magnetic spacing control layer formed between the MTJ and conductive line. The spacing control layer has a thickness of 0.02 to 0.12 microns to maintain the distance separating free layer and conductive line between 0.03 and 0.15 microns. The spacing control layer is aligned parallel to the conductive line and contacts a plurality of MTJ elements in a row of MRAM cells. Half-select error problems are avoided while maintaining high write efficiency. A spacing control layer may be formed between a word line and a bottom electrode in a top pinned layer or dual pinned layer configuration.


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