The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 24, 2012

Filed:

Aug. 27, 2008
Applicants:

Kenji Maeda, Kudamatsu, JP;

Tomoyuki Tamura, Kudamatsu, JP;

Hiroyuki Kobayashi, Kodaira, JP;

Kenetsu Yokogawa, Tsurugashima, JP;

Tadamitsu Kanekiyo, Kudamatsu, JP;

Inventors:

Kenji Maeda, Kudamatsu, JP;

Tomoyuki Tamura, Kudamatsu, JP;

Hiroyuki Kobayashi, Kodaira, JP;

Kenetsu Yokogawa, Tsurugashima, JP;

Tadamitsu Kanekiyo, Kudamatsu, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/302 (2006.01);
U.S. Cl.
CPC ...
Abstract

A plasma processing method using plasma includes steps of applying current to a coil and introducing gas into a processing chamber, applying a bias power that does not generate plasma, applying a source power to generate plasma so that a plasma density distribution is high above an outer circumference of a semiconductor wafer and low above a center of the semiconductor wafer, and forming a shape of a sheath layer having a positive ion space charge directly above the semiconductor wafer so as to be convex in an upper direction from the semiconductor wafer, thereby eliminating foreign particles trapped in a boundary of the sheath layer having a positive ion space charge directly above the semiconductor wafer, generating plasma for processing the semiconductor wafer under a condition different from the conditions of the previous steps.


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