The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 24, 2012
Filed:
Jul. 30, 2010
Danielle A. Thomas, Dallas, TX (US);
Harry Michael Siegel, Hurst, TX (US);
Antonio A. DO Bento Vieira, Carrollton, TX (US);
Anthony M. Chiu, Richardson, TX (US);
Danielle A. Thomas, Dallas, TX (US);
Harry Michael Siegel, Hurst, TX (US);
Antonio A. Do Bento Vieira, Carrollton, TX (US);
Anthony M. Chiu, Richardson, TX (US);
STMicroelectronics, Inc., Carrollton, TX (US);
Abstract
A system and method is disclosed for providing a redistribution metal layer in an integrated circuit. The redistribution metal layer is formed from the last metal layer in the integrated circuit during manufacture of the integrated circuit before final passivation is applied. The last metal layer provides sites for solder bump pads used in flip chip interconnection. The redistribution metal layer can be (1) a flat layer deposited over the next to last metal layer through an opening in a dielectric layer, or (2) deposited over an array of vias connected to the next to last metal layer. Space between the solder bump pads is deposited with narrower traces for connecting active circuit areas below. A final passivation layer is deposited to ensure product reliability.