The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 20, 2012

Filed:

Jun. 08, 2010
Applicants:

Gyu-hwan OH, Hwaseong-si, KR;

Shin-jae Kang, Yongin-si, KR;

In-sun Park, Suwon-si, KR;

Hyun-seok Lim, Suwon-si, KR;

Nak-hyun Lim, Yongin-si, KR;

Hyun-suk Lee, Suwon-si, KR;

Inventors:

Gyu-Hwan Oh, Hwaseong-si, KR;

Shin-Jae Kang, Yongin-si, KR;

In-Sun Park, Suwon-si, KR;

Hyun-Seok Lim, Suwon-si, KR;

Nak-Hyun Lim, Yongin-si, KR;

Hyun-Suk Lee, Suwon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 47/00 (2006.01); H01L 27/108 (2006.01); H01L 29/94 (2006.01); H01L 31/032 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods of fabricating integrated circuit memory cells and integrated circuit memory cells are disclosed. An integrated circuit memory cell can be fabricated by forming an ohmic layer on an upper surface of a conductive structure and extending away from the structure along at least a portion of a sidewall of an opening in an insulation layer. An electrode layer is formed on the ohmic layer. A variable resistivity material is formed on the insulation layer and electrically connected to the electrode layer.


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