The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2012
Filed:
Jun. 18, 2007
Hsiang Lan Lung, Hsinchu, TW;
Chieh Fang Chen, Banciao, TW;
Yi Chou Chen, Hsinchu, TW;
Shih Hung Chen, Jhudong Township, TW;
Chung Hon Lam, Peekskill, NY (US);
Eric Andrew Joseph, White Plains, NY (US);
Alejandro Gabriel Schrott, New York, NY (US);
Matthew J. Breitwisch, Yorktown Heights, NY (US);
Geoffrey William Burr, Cupertino, CA (US);
Thomas D. Happ, Tarrytown, NY (US);
Jan Boris Philipp, Peekskill, NY (US);
Hsiang Lan Lung, Hsinchu, TW;
Chieh Fang Chen, Banciao, TW;
Yi Chou Chen, Hsinchu, TW;
Shih Hung Chen, Jhudong Township, TW;
Chung Hon Lam, Peekskill, NY (US);
Eric Andrew Joseph, White Plains, NY (US);
Alejandro Gabriel Schrott, New York, NY (US);
Matthew J. Breitwisch, Yorktown Heights, NY (US);
Geoffrey William Burr, Cupertino, CA (US);
Thomas D. Happ, Tarrytown, NY (US);
Jan Boris Philipp, Peekskill, NY (US);
Macronix International Co., Ltd, Hsinchu, TW;
International Business Machines Corporation, Armonk, NY (US);
Qimonda North America Corp., Cary, NC (US);
Abstract
A method for manufacturing a mushroom-cell type phase change memory is based upon manufacturing a pillar of bottom electrode material upon a substrate including an array of conductive contacts in electrical communication with access circuitry. A layer of electrode material is deposited making reliable electrical contact with the array of conductive contacts. Electrode material is etched to form a pattern of electrode pillars on corresponding conductive contacts. Next, a dielectric material is deposited over the pattern and planarized to provide an electrode surface exposing top surfaces of the electrode pillars. Next, a layer of programmable resistive material, such as a chalcogenide or other phase change material, is deposited, followed by deposition of a layer of a top electrode material. A device including bottom electrode pillars with larger bottom surfaces than top surfaces is described.