The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 28, 2012
Filed:
Feb. 12, 2008
Chun-hung Lee, Hsinchu County, TW;
Chia-chi Chung, Hsinchu, TW;
Hsin-chih Chen, Tucheng, TW;
Jeff J. Xu, Jhubei, TW;
Neng-kuo Chen, Sinshih Township, Tainan County, TW;
Chun-Hung Lee, Hsinchu County, TW;
Chia-Chi Chung, Hsinchu, TW;
Hsin-Chih Chen, Tucheng, TW;
Jeff J. Xu, Jhubei, TW;
Neng-Kuo Chen, Sinshih Township, Tainan County, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Abstract
A method is disclosed for etching an integrated circuit structure within a trench. A layer to be etched is applied over the structure and within the trench. A CF-based polymer is deposited over the layer to be etched followed by deposition of a capping layer of SiOCl-based polymer. The CF-based polymer reduces the width of the trench to such an extent that little or no SiOCl-based polymer is deposited at the bottom of the trench. An Oplasma etch is performed to etch through the CF-based polymer at the bottom of the trench. The Oplasma etch has little effect on the SiOCl-based polymer, the thus the upper surfaces of the structure remain covered with polymer. Thus, these upper surfaces remain fully protected during subsequent etching of the layer to be etched.