The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 28, 2012
Filed:
Nov. 05, 2007
Francois J. Henley, Aptos, CA (US);
Albert Lamm, Suisun City, CA (US);
Babak Adibi, Los Altos, CA (US);
Francois J. Henley, Aptos, CA (US);
Albert Lamm, Suisun City, CA (US);
Babak Adibi, Los Altos, CA (US);
Silicon Genesis Corporation, San Jose, CA (US);
Abstract
Free standing thickness of materials are fabricated using one or more semiconductor substrates, e.g., single crystal silicon, polysilicon, silicon germanium, germanium, group III/IV materials, and others. A semiconductor substrate is provided having a surface region and a thickness. The surface region of the semiconductor substrate is subjected to a first plurality of high energy particles generated using a linear accelerator to form a region of a plurality of gettering sites within a cleave region, the cleave region being provided beneath the surface region to defined a thickness of material to be detached, the semiconductor substrate being maintained at a first temperature. The surface region of the semiconductor substrate is subjected to a second plurality of high energy particles generated using the linear accelerator, the second plurality of high energy particles being provided to increase a stress level of the cleave region from a first stress level to a second stress level.