The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 21, 2012

Filed:

Feb. 11, 2008
Applicants:

Liang Yin, San Jose, CA (US);

Harry Muljono, Union City, CA (US);

Sunil Kumar, Santa Clara, CA (US);

Alex Kuperman, Campbell, CA (US);

Inventors:

Liang Yin, San Jose, CA (US);

Harry Muljono, Union City, CA (US);

Sunil Kumar, Santa Clara, CA (US);

Alex Kuperman, Campbell, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one embodiment, the present invention includes a receiver having a delay lock loop (DLL) to receive a clock signal and to generate a plurality of clock phases therefrom, and an offset controller including a first register set for a first phase interpolator and a second register set for a second phase interpolator. At initiation of a track pre-tune process, both phase interpolators are controlled to generate sampling signals at a common clock phase. Other embodiments are described and claimed.


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