The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 21, 2012
Filed:
Feb. 13, 2009
Zhigang Wang, Sunnyvale, CA (US);
Fethi Dhaoui, Patterson, CA (US);
John Mccollum, Saratoga, CA (US);
Vidyadhara Bellippady, San Jose, CA (US);
Zhigang Wang, Sunnyvale, CA (US);
Fethi Dhaoui, Patterson, CA (US);
John McCollum, Saratoga, CA (US);
Vidyadhara Bellippady, San Jose, CA (US);
Actel Corporation, Mountain View, CA (US);
Abstract
A push-pull non-volatile memory array includes memory cells with an n-channel non-volatile pull-down transistor in series with a p-channel volatile pull-up transistor. A non-volatile transistor row line is associated with each row of the array and is coupled to the control gates of each n-channel non-volatile pull-down transistor in the row. A volatile transistor row line is associated with each row of the array and is coupled to the control gates of each p-channel volatile pull-up transistor in the row with which it is associated. A column line is associated with each column in the array and is coupled to the source of each p-channel volatile pull-up transistor in the column with which it is associated.