The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 24, 2012
Filed:
Aug. 02, 2007
Takashi Noma, Ota, JP;
Yuichi Morita, Yokosuka, JP;
Hiroshi Yamada, Ebina, JP;
Kazuo Okada, Ota, JP;
Katsuhiko Kitagawa, Ota, JP;
Noboru Okubo, Kumagaya, JP;
Shinzo Ishibe, Gunma, JP;
Hiroyuki Shinogi, Gifu, JP;
Takashi Noma, Ota, JP;
Yuichi Morita, Yokosuka, JP;
Hiroshi Yamada, Ebina, JP;
Kazuo Okada, Ota, JP;
Katsuhiko Kitagawa, Ota, JP;
Noboru Okubo, Kumagaya, JP;
Shinzo Ishibe, Gunma, JP;
Hiroyuki Shinogi, Gifu, JP;
SANYO Semiconductor Co., Ltd., Gunma, JP;
Semiconductor Components Industries, LLC, Phoenix, AZ (US);
Abstract
This invention is directed to offer a package type semiconductor device that can realize a smaller size device and its manufacturing method as well as a small stacked layer type semiconductor device and its manufacturing method. A device componentand a pad electrodeelectrically connected with the device componentare formed on a semiconductor substrate. A supporting memberis bonded to a surface of the semiconductor substratethrough an adhesive layer. There is formed a through-holein the supporting memberpenetrating from its top surface to a back surface. Electrical connection with another device is made possible through the through-hole. A depressed portionis formed in a partial region of the top surface of the supporting member. Therefore, all or a portion of another device or a component can be disposed utilizing a space in the depressed portion. When a stacked layer type semiconductor device is formed, stacking is made by fitting a portion of a semiconductor devicein an upper layer to an inside of the depressed portion