The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 27, 2011
Filed:
Mar. 27, 2009
Constantin Bulucea, Sunnyvale, CA (US);
William D. French, San Jose, CA (US);
Donald M. Archer, Santa Clara, CA (US);
Jeng-jiun Yang, Sunnyvale, CA (US);
Sandeep R. Bahl, Palo Alto, CA (US);
D. Courtney Parker, Topsham, ME (US);
Constantin Bulucea, Sunnyvale, CA (US);
William D. French, San Jose, CA (US);
Donald M. Archer, Santa Clara, CA (US);
Jeng-Jiun Yang, Sunnyvale, CA (US);
Sandeep R. Bahl, Palo Alto, CA (US);
D. Courtney Parker, Topsham, ME (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A group of high-performance like-polarity insulated-gate field-effect transistors (, andor, and) have selectably different configurations of lateral source/drain extensions, halo pockets, and gate dielectric thicknesses suitable for a semiconductor fabrication platform that provides a wide variety of transistors for analog and/or digital applications. Each transistor has a pair of source/drain zones, a gate dielectric layer, and a gate electrode. Each source/drain zone includes a main portion and a more lightly doped lateral extension. The lateral extension of one of the source/drain zones of one of the transistors is more heavily doped or/and extends less deeply below the upper semiconductor surface than the lateral extension of one of the source/drain zones of another of the transistors.